Method for Controlling the Bit’s Deviations of Successive Approximation ADC with Weight Redundancy from Analysis of Output Code

Abstract

The analysis of transfer curve successive approximation ADC with weight redundancy is done. It is shown that unlike binary ADCs, not all code combinations are used to represent an input signal. The number of unused combinations is determined by the base of counting system and increases with its decreasing. There has been presented the method of control of the unused combinations in the transfer curve of the successive approximation ADC with weight redundancy. This method allows recording the fact of the deviations of the weight of the digits of the converter directly in the conversion process. Also, under certain conditions, this allows to determine the bit or bits in which the deviation occurred. The conditions of appearance of unused combinations, their location and reasons for switching combinations from one category to another are determined. It is shown that unused combinations form groups that are located in fixed zones of ADC transfer curve. It is shown that for each zone there is a most influential bit. The structure of unused combinations zones is considered, in particular, it is shown that certain zones consist of several sub-regions, and the deviation of the corresponding bit equally affects the changes in the list of unused combinations of each subzone, which significantly simplifies the procedure for controlling the deviation of the weight of the corresponding bit. The algorithm of the successive approximation ADC with weight redundancy is proposed, which involves the procedure of unused combinations record by observing in the mode of converting a test or ordinary input signal and a procedure for controlling the transition of combinations from the category of unused to used and vice versa. The requirements for the auxiliary and basic signal are defined, which will allow to discover unused combinations. The recommendations for the proposed method realization for the rapid detection of bits deviations in the successive approximation ADC with weight redundancy have been developed.